1. Technical Field
Embodiments relate to a three-dimensional (3D) nonvolatile memory device, and more particularly, to a 3D nonvolatile memory device with a stepped slimming region which is formed only in one side of a stack of word lines and has a larger width than a cell region.
2. Related Art
Nonvolatile semiconductor memory devices are memory devices in which stored data is retained even when power is interrupted. Currently, as a degree of integration in the 2D semiconductor devices in which memory cells are two-dimensionally formed on a silicon substrate reaches its limit, 3D semiconductor nonvolatile devices in which memory cells are vertically stacked on a silicon substrate have been proposed.
In the 3D nonvolatile semiconductor devices, a desired memory cell is driven by applying biases to multi-layered word lines stacked on the substrate. Pad parts are formed in the word lines by patterning the word lines formed in the slimming region in the stepped form. The word lines stacked in the multiple layers may be controlled by forming contact plugs and metal interconnections electrically coupled to the word lines.
As the pitch of cell blocks is gradually reduced due to the increase in the degree of integration of the semiconductor devices, the slimming region is arranged in both sides of the word line to ensure the margin as in the 3D nonvolatile memory device in the related art. Pass transistors are arranged in both sides of the cell region.
However, when the slimming regions are formed in the both sides of the word line and the pass transistors are arranged in both sides of the cell region, a plurality of wells for the pass transistors having the same power are formed, thus increasing an area of the slimming regions.